Schematic comparison

I've inherited a bunch of mid-sized FPGA designs which were all done in schmatic form. Yeah yeah, I don't need to hear how deep in it I am.

I will convert this to VHDL, but in the meantime what I want to know is if there is a way to compare two schematic based designs in Quartus?

Also, how can I choose a wire with its corresponding net name, and find out where it goes?

Thanks for your help in advance!