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Altera_Forum's avatar
Altera_Forum
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15 years ago

Schematic comparison

I've inherited a bunch of mid-sized FPGA designs which were all done in schmatic form. Yeah yeah, I don't need to hear how deep in it I am. I will convert this to VHDL, but in the meantime wha...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

i would try RTL Viewer to see if you can get an idea of where signals go

comparing designs will be difficult. if they are different revs of the same design, you may try to make sense of a diff output