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Honored Contributor
Honored Contributor"Report path" in time Quest timing analyzer, optimization of orignal circuit
I want to see paths in my original circuit along with logic element within paths. i write a verilog code, compile it, and then run the time quest timing analyzer in order to check paths and lo...
Altera_ForumHonored Contributor
Honored Contributori basically want to generate the report about paths present in a circuit from command "report path" available in timing analyzer but timing analyzer runs after fitter.
i m using quartus prime pro edition. my input is verilog code. what i m getting from your response is the timing analyzer is always going to use the post-fit netlist in order to provide accurate final timing numbers. we cannot run timing analyzer before fitter. hence all the results obtain from timing analyzer are based on optimize circuit. m i rite? is there some old version of quartus where we run timing analyzer before fitter. or any other way for locating paths in a circuit. Thankyou for your time and consideration
