Forum Discussion
FvM
Super Contributor
7 days agoHi,
I believe specification of Multiply Accumulation operation in IP user guide is quite clear
Out(t) = [Ay(t) * Az(t)] + Out (t-1)
But it's essentially a question of hardware features. Description of DSP block architecture in Device Handbook clarifies that FP adder output is a 32-bit word, no features to recirculate a result with higher resolution as required by FMA.
Regards
Frank