Forum Discussion
Question Regarding Clock Synchronization in EyeQ BER function
- 2 years ago
Hi,
I understand, your confusion. My understanding is that from the statement i.e., "The transceivers do not support the XGMII interface to the MAC/RS as defined in the IEEE 802.3-2008 specification. Instead, they support a 64-bit data and 8-bit control SDR interface between the MAC/RS and the PCS." it is Single Data Rate Only but width of data and control word becomes double i.e., 64-bit and 8-bit Actually you achieves the same data rate.
So, no need to sample at rising and falling edge for double data rate.
Hope this clarifies.
Thank you,
Kshitij Goel
Hi,
As we do not receive any response from you on the previous answer that we have provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.
Thank you,
Kshitij Goel
- DeadEnd2 years ago
New Contributor
I apologize for the delay in responding.
I'll do some more research and ask you if you have any additional questions.
Thank you very much for your help.