Forum Discussion
Fpga_Egr_2025
Occasional Contributor
Occasional ContributorQuestasim UVM macros
Hi , I am trying to compile and run simulation in Questasim , using uvm libraries and uvm packages. But i am getting error that include files not defined , although these uvm files are installed in...
RichardT_altera
Super Contributor
Super ContributorAre you using correct command?
I think you should run
vlog -sv -work work +incdir+C:/intelFPGA_lite/24.1std/questa_fse/verilog_src/uvm-1.1d/src uvm_sim_pk.sv
(there is a space in between uvm_sim_pk.sv and _incdir+C...)
instead of
vlog -sv -work work +incdir+C:/intelFPGA_lite/24.1std/questa_fse/verilog_src/uvm-1.1d/src/tlml/uvm_tlm_imps.svh
Regards,
Richard Tan
