Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Quartus switch to keep all logic

I am trying to compile a very large design block per block, the complete design will not fit in one FPGA . Is there a way: 1. To tell Quartus not to remove any logic even if inputs are fl...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

If your design is too large to fit into the selected FPGA, synthethizing it block by block won't help you. You need to

a) optimize you design

b) try a better tool (ie, Synplify)

c) get a bigger FPGA

If you're just trying to synthetize each block to understand how many resources and why it's taking, just set each block as top level and synthetize the design.