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Siyeon's avatar
Siyeon
Icon for New Contributor rankNew Contributor
3 years ago

Quartus prime lite edition 20.1.1 gate level simulation

I want to perform gate level simulation in Quartus Prime Lite Edition.

After selecting "Tools → Run simulation tool → gate level simulation" and viewing the ModelSim waveforms, I noticed that the data arrives exactly on the clock edges.

It seems like the electron movement time is not being considered. I'm wondering if I made a wrong option selection or if timing information is not supported in this version.

I tried running a simulation with the following simple Verilog code.

module seq_model(b,rstb,clk,a);
output reg b;
input rstb, a, clk;
always @(posedge clk or negedge rstb)
if(!rstb)
b <= 0;
else
b <= a;
endmodule

I generated and provided all input signals directly in ModelSim for the simulation. The "clk" signal repeats every 10 ns, the "rstb" signal is 0 from 0 to 15 ns and 1 afterward, and the "a" signal follows a clock-like pattern repeating every 20 ns.

Hdl
Simulation
Timing

4 Replies

  • sstrell's avatar
    sstrell
    Icon for Super Contributor rankSuper Contributor
    3 years ago

    What is your target device? Most current devices do not support gate level simulation. To verify devices these days, it's recommended to use RTL simulation along with the results from the Quartus timing analyzer.

  • ShengN_altera's avatar
    ShengN_altera
    Icon for Super Contributor rankSuper Contributor
    3 years ago

    Hi,


    Check this link https://www.intel.com/content/www/us/en/docs/programmable/683080/22-1/simulation-levels.html

    Note: Gate-level timing simulation of an entire design can be slow and should be avoided. Gate-level timing simulation is supported only for the Arria® II GX/GZ, Cyclone® IV, MAX® II, MAX® V, and Stratix® IV device families.. Use Timing Analyzer static timing analysis rather than gate-level timing simulation.


    Thanks,

    Best Regards,

    Sheng


    • Siyeon's avatar
      Siyeon
      Icon for New Contributor rankNew Contributor
      3 years ago

      I've solved it. Thank you.