New Contributor
Regular ContributorHi,
Can you check if there any error if you generate the IP only by clicking on Generate HDL button at bottom right of the IP GUI?
The error messages above related to example design generation.
Generating the IP only does not generate the example design.
The tcl scripts are located in the example design directory. Default: ..\alt_mem_if_civ_ddr2_emif_0_example_design\
There is a readme.txt file that describes how to use the tcl script.
make_qii_design.tcl is for generating synthesis design.
make_sim_design.tcl is for generating simulation design.
Are you able to generate other EMIF IP such as UniPHY DDR3 example design?
Regards,
Adzim
New ContributorCan you check if there any error if you generate the IP only by clicking on Generate HDL button at bottom right of the IP GUI?
It can succeed but contains the following warning
"Warning: ddr2_ip.alt_mem_if_civ_ddr2_emif_0.phy.RESET_REQUEST: Associated reset sinks not declared"
Are you able to generate other EMIF IP such as UniPHY DDR3 example design?
Because I am using cyclone iv, it does not have the UniPhy function.
