Forum Discussion
Altera_Forum
Honored Contributor
7 years agoIn build.bat file you need to add -gvhdl as a compiler option to i++.
So it should be look like i++ -march="fpgafamily" -gvhdl counter.cpp -o test-fpga.exe Then build test-fpga and run test-fpga.exe. This will create a simulation file under verification folder. Finally, open the verification\vsim.wlf file with Modelsim.