Forum Discussion
New ContributorQuartus Lite 'No paths found'
O.k., you didn't show the registered part of your design.
Problem is however, that your state logic is creating latches by incompletely decoding states, which breaks timing analysis of states register. To remove latches, preset nextstate to current state:always @(*) //1st process (transitions) begin nextstate = states; case(states)
Super ContributorO.k., you didn't show the registered part of your design.
Problem is however, that your state logic is creating latches by incompletely decoding states, which breaks timing analysis of states register. To remove latches, preset nextstate to current state:
always @(*) //1st process (transitions) begin nextstate = states; case(states)
BallerYes! It worked. This also explains why other files I generated (with default states or default case statements) work without issue.
If you don't mind me asking, would setting initial starting values for each and every module (for example state = st0, nextstate=state and out=1'b0) similiarly solve the latch issue for any future generated files?
I am extremely thankful for your assitanceEdit: I got too excited and didn't see the logic implication. My design generates different possible file descriptions (safe, with default state/out and 3,2 and 1 process ones) and adding this specific lines of code defeats the purpose of having different implementations as I believe it automatically turns them into safe FSM. I will explore the subject further. Again, I am very thankful for your assistance
