Forum Discussion
RichardT_altera
Super Contributor
1 year agoDoes the same error occur with Verilog option?
Do you also see the same error with the latest Quartus Pro version 24.1?
Are you using the Siemen Questasim or the Questa Intel FPGA Edition?
Questa Intel FPGA Edition seems to works fine.
Regards,
Richard Tan
PSchl7
New Contributor
1 year agoHello Richard
Many thanks for your answer.
I did rerun the compiler with the Verilog option on and did use Siemens Questasim. It then passes without any errors.
Guess this is the way we have to use the "Simulation Library Compiler" in future.
Regards,
Peter