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AVanB3's avatar
AVanB3
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

Quartus II apparently doesn't automatically use the simulation testfile that was made for a 4 to 1 Mux and its already in the VHDL file put in In- and output declarations to simulate input data without manually presetting the in-and outputs first?

A complete VHDL file with added testbench file of a 4to1 Mux apparently doesn't run any simulation in Quartus II 13.x ? I do not know if I still have to config all in and outputs first manually. Or t...
AVanB3's avatar
AVanB3
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

Hereby added the mux4to1 file with testbench part that doesn't automatically start or instruct the simulation.