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Ranjith21's avatar
Ranjith21
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Quartus 23.4 shows 0.0 BER but negative eye height values

Hi, I am running BER test for 2 FPGAs. I am transmitting from Tx pin of first FPGA and receiving on Rx pin on second FPGA. Using Quartus 23.4 here. Both are Agilex F-tile F-series FPGAs. There is ...
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ZiYing_Intel's avatar
ZiYing_Intel
Icon for Frequent Contributor rankFrequent Contributor
2 years ago

Hi,


Since no hear any feedback from you, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread.


Best regards,

zying


Ranjith21's avatar
Ranjith21
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

@ZiYing_Intel

Please check my comments. I have updated my responses on 02-20-2024

Please scroll up

Thanks,

Ranjith