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EugeneF's avatar
EugeneF
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3 years ago
Solved

Quartus 18.1 fitter crash

Sometimes (after minor changes) during project compilation fitter crashes with an error:

Error:
Internal Error: Sub-system: VPR20KMAIN, File: /quartus/fitter/vpr20k/vpr_common/cluster_legality_pincount.c, Line: 1332
Internal Error
Stack Trace:
0x573ec0: vpr_qi_jump_to_exit + 0x70 (fitter_vpr20kmain)
0xf20b7: vpr_exit_at_line + 0x97 (fitter_vpr20kmain)
0xf2100: handle_assertion_failure_stripped + 0x30 (fitter_vpr20kmain)
0x930e9: cl_legality_pincount_block_list_legal_for_inputs_and_outputs + 0x239 (fitter_vpr20kmain)
0x69470: l_block_list_feasible_with_specified_inputs + 0x150 (fitter_vpr20kmain)
0x69ccb: l_block_list_feasible_with_default_inputs_vpr_engine + 0xcb (fitter_vpr20kmain)
0x6646f: cl_block_list_and_first_ale_position_feasible_with_default_inputs + 0x1cf (fitter_vpr20kmain)
0x4a33f: l_anneal_try_ale_swap + 0x23f (fitter_vpr20kmain)
0x4a00f: l_anneal_try_pair_swaps + 0x20f (fitter_vpr20kmain)
0x4820f: l_anneal_prl_try_pair_swaps + 0x9f (fitter_vpr20kmain)
0x19e825: l_smid_job_thread_fn + 0x75 (fitter_vpr20kmain)
0x5c49cd: l_thread_start_wrapper + 0x3d (fitter_vpr20kmain)
0x1467e: msg_thread_wrapper + 0x6e (CCL_MSG)
0x16660: mem_thread_wrapper + 0x70 (ccl_mem)
0x2791: thr_thread_begin + 0xa1 (ccl_thr)
0x1570c: BaseThreadInitThunk + 0xc (kernel32)
0x5385c: RtlUserThreadStart + 0x1c (ntdll)

End-trace


Executable: quartus
Comment:
None

System Information
Platform: windows64
OS name: Windows 7
OS version: 6.1

Quartus Prime Information
Address bits: 64
Version: 18.1.0
Build: 625
Edition: Standard Edition

Device: Cyclone V 5CEFA9F23I7

Deletting db doesn't help. Different fitter settings also doesn't work.

  • IntelSupport's avatar
    IntelSupport
    3 years ago

    Hi Eugene,


    Please let me know if you are able to resolve this using below suggestion.


    Update:


    I am able to pin down the IE is triggered during heuristic accounting of input pins to a cluster. This heuristic counting is used to generate packing that give more flexibility for router to resolve local congestions for outlier designs, so it should be generally safe to disable this. I have tried the INI to disable this algorithm and the design is able to compile successfully.


    Here is the encrypted INI (copy and paste this ini in your qsf) for 21.1 std (encrypted INI support is only avaliable for 20.1std or newer) then recompile.

    ini_password = 0f56f88f5713676e261178731ef27f42b49cd891b355d81b400032576444751330035221150003342320131030052576




23 Replies

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  • SyafieqS's avatar
    SyafieqS
    Icon for Super Contributor rankSuper Contributor
    3 years ago

    Hello,


    This is still pending from developer for update.


    May I know how urgent this issue is?

    Is this internal error total roadblock your development?



    • EugeneF's avatar
      EugeneF
      Icon for New Contributor rankNew Contributor
      3 years ago
      Hello. It is not a total block, because we are able to find some compilable variant by making some random project changes. But that significantly increase development time after any project upgrade. So we are still waiting for the solution.
  • SyafieqS's avatar
    SyafieqS
    Icon for Super Contributor rankSuper Contributor
    3 years ago

    Hi Eugene,


    Understood. Below are some updates and request answer from developer. Let me know if that is not possible


    Update: This IE is triggered when clusterer is determining if the LAB is legal by counting the inputs. The code assumes the input counts should be back to zero when all blocks are removed, but that's not the case for this design.


    Unfortunately, this design seems to hit a rare corner case. Without the actual design that contains the specific LAB that triggers the IE, it is hard to identify the root cause of this bad behavior. And without this information, there are no simple/safe workarounds to bypass this IE.



    Questions:


    Have this design ever compiled successfully before?


    Does you try to compile the design using different seeds?


    Does you see any User Error/Warning messages before the IE?


    Are there any special netlist topology? (self feeding loops, special location constraints, etc)


    Is it possible to to pass in a post-mapped database (archived qar file) without the source, so that we can run quartus_fit at our end?


    • EugeneF's avatar
      EugeneF
      Icon for New Contributor rankNew Contributor
      3 years ago

      Hello!

      Yes, sometimes this design compilled succesfully. Then, after some minor changes, it compiles with this error. Then, after some other changes in other places (adding some extra registers for example) it again compiles succesfully, ets... It can be a "random" changes in different places, not connected to some particular place or block of the design.

      Different seeds doesn't affect to the error. But different optimization settings (performance/power/area) sometimes help to eliminate error. (Or sometimes get it back)

      There are no any Error messages before IE. Only some Warnings about severall unconstrained internall clocks in project.

      There a no special location constraints. Only location for input/output pins.

      How to create that post-mapped database?

  • SyafieqS's avatar
    SyafieqS
    Icon for Super Contributor rankSuper Contributor
    3 years ago

    How to create that post-mapped database?

    • There is KDB for this but for some reason it is offline, thus I post it here. Let me know if this is not possible.


    Method 1: Using a Quartus II Archive File

    Use the following procedure to export a Quartus II design database that does not include design source files. This method creates one archive file that someone else can use to recreate the project and compilation results without the source HDL files.

    1. In the Quartus II software, from the Project menu, choose Archive Project.

    2. Enter an Archive file name. The default is the current revision name for the project.

    3. Under Include the following optional database files, select one of the following options:

    o If the option is available for your device family, select Version-compatible database files (For future versions of the Quartus II software). This option is typically not available for devices that include any preliminary information in the Quartus II software (that is, the newest device families).

    o If the above option is not available, select Compilation and simulation database files (For current versions of the Quartus II software). Note that this archive must be opened in the same Quartus II software version if you want to preserve the compilation results from the database.

    4. Click Add/Remove Files.

    5. Highlight the design files that do you not want to include in the archive, and click Remove. To highlight multiple files at once, hold the Ctrl key and click on each one, or hold the Shift key to highlight a set of files. You can also sort by file type by clicking on the Type column header; this allows you to find all the HDL files easily. Note that you can also remove other large files from the archive to reduce the archive file size, such as .pof, .sof, .pin, and .rpt files. Do not remove any files from the db directory.

    6. Click OK in the Archive Complete dialog box that appears. If you chose to create a version-compatible database, by default the archive process creates a copy of the database in a directory called export_db.

    7. You can now send out the software-generated archive file with the name <archive file name>.qar.



  • SyafieqS's avatar
    SyafieqS
    Icon for Super Contributor rankSuper Contributor
    3 years ago

    Eugene,


    Did you manage to follow the step that I gave? Let me know if there is any update.


  • EugeneF's avatar
    EugeneF
    Icon for New Contributor rankNew Contributor
    3 years ago

    Hello!

    Sorry for the late reply.

    I am sending a compilation database archive file. Created in Quartus 20.1.

    Hope it helps.

  • SyafieqS's avatar
    SyafieqS
    Icon for Super Contributor rankSuper Contributor
    3 years ago

    Eugene,


    Thank you. I have passed the qar for further investigation. Will let you know if there is any update.


  • SyafieqS's avatar
    SyafieqS
    Icon for Super Contributor rankSuper Contributor
    3 years ago

    Hi Eugene,


    I am pending reply from engineering regarding this. Will update you once there is any


  • IntelSupport's avatar
    IntelSupport
    Icon for Contributor rankContributor
    3 years ago

    Hi Eugene,


    Let me know if there is any update on this workaround.


    p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 5/5 survey.


  • EugeneF's avatar
    EugeneF
    Icon for New Contributor rankNew Contributor
    3 years ago

    Hello!

    Thank you so much for the solution! We tested it with our project in different settings and some changes, and it always compiles well without any errors. So it works. We wil use it. Thanks!

  • IntelSupport's avatar
    IntelSupport
    Icon for Contributor rankContributor
    3 years ago

    I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.

    p/s: If any answer from community or Intel support are helpful, please feel free to mark as solution, give Kudos and rate 5/5 survey