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Luca's avatar
Luca
Icon for New Contributor rankNew Contributor
5 years ago

[Quartus 17.0] Internal Error: Sub-system: CCLK, File: /quartus/periph/cclk/cclk_gen5_base.cpp, Line

Hello there, I'm trying to add a second external clock source to a design implemented on a DE10-Standard Kit. I'd like to use the J14/HSMC_CLKIN0 pin as single-ended clock source actually, then use...
SyafieqS's avatar
SyafieqS
Icon for Super Contributor rankSuper Contributor
5 years ago

Hi Luca,


Could you provide the design file for me to replicate the issue? You can attach it via private message/email feature there. Let me see it first, if it a bug from Quartus I can file a report for this.


Thanks,

Regards