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davidr1529's avatar
davidr1529
Icon for New Contributor rankNew Contributor
2 years ago

Quartus 12.0 Missing Bus Signal

Hello, I've been trying to debug a large circuit for a while, and with no luck I decided to try to replicate some errors in smaller circuits. I've been having no issue with the general compilation, ...
Hdl
sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
2 years ago

For both of these, you don't have a name on the busses before splitting them off to individual signals. You need GROUNDS[3..0] in the first and B[3..0] in the second. Busses don't pick up names from logic they're connected to in a schematic. You have to give them a name which can then be bit sliced.

Better suggestion: learn an HDL and get away from schematics if you can.