NYao
New Contributor
New ContributorQuartus中的路径约束
Hi， 我需要在Qartus 18.1中做3个信号的路径约束。将三个寄存器的输出连到3个相邻的管脚上，要求3个信号的延时相同，最好走的路径也相近，请问怎么约束？
Forum Discussion
KhaiChein_Y_Intel
Regular Contributor
Regular ContributorHi,
You may set a region for placement and routing but not a specific routing path. To lock the region, you may use logic lock.
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-qpp-design-optimization.pdf Chapter 6.5.1. Creating Logic Lock Assignments with Tcl commands
Thanks.
