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FabianL's avatar
FabianL
Icon for Occasional Contributor rankOccasional Contributor
9 months ago
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QSYS 25.3pro failed to generate VHDL simulation files for altera_remote_update_core

Hello, If I use altera_remote_update_core in a QSYS project using Quartus Version 25.3pro, the IP Generation fails with the following error message   Info: sib_flash_subsys_remote_update_0: "Gene...
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  • RichardT_altera's avatar
    RichardT_altera
    9 months ago

    Thank you for finding this issue.
    I was able to duplicate the error and will ask our tool specialist to further investigate.
    In the meantime, as a workaround, please avoid selecting "VHDL" for Simulation Model generation.

    Regards,
    Richard Tan

RichardT_altera's avatar
RichardT_altera
Icon for Super Contributor rankSuper Contributor
9 months ago

Thank you for finding this issue.
I was able to duplicate the error and will ask our tool specialist to further investigate.
In the meantime, as a workaround, please avoid selecting "VHDL" for Simulation Model generation.

Regards,
Richard Tan