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Altera_Forum
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11 years ago

Qsys : using pll locked conduit as a reset

Hi everyone, I'm facing a little problem but it's very annoying. I have implemented a QSYS system with a PLL and a NIOS2 processor. The processor is run by a clock generated by the p...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

Hi guys and thanks for your reply.

I was already aware of these workarounds and I was searching for some better solutions but obviously, there isn't any !

If an altera worker see this thread, I just want to say that PLL locked signals are always used as reset, and it's just not understandable that qsys do not allow this behaviour.

Cheers,

Aurélien