Altera_Forum
Honored Contributor
13 years agoqsys - Avalon MM master export
Hi,
I was not able to find in a couple of searches an answer to my question, so here I start a new thread: I need to make Qsys export an Avalon-MM Master for configuring my hand-coded components. As there is no such option available in Qsys, I thought of a trick: * new component with one Avalon-MM slave and one master (see the _tcl.txt attachment) * the vhdl unit instantiated by this component would simply wire slave ifc signals with master ifc signals * the slave interface connected to the nios * the master interface exported For some reason this is not working... I mean I see no activity on this interface, although it was generated without errors. are there better ways to export a master interface to the module ports? thanks!