Forum Discussion
Problems working thru "Using Triple-Speed Ethernet on DE2-115 Boards"
I'm trying to get this running.. it is an 'altera corporation - university program' pdf of a triple speed ethernet design. Sort of a bare-bones way to get ethernet working at 10/100/1000 with a NIOS2.
Here are the problems I'm having implementing this with QuartusII-13sp1 web. 1. The megawizard plugin manager keeps crashing and won't generate the my_ddio module 2. The PLL is greyed out for cyclone IV's... not greyed out for cyclone V's. 3. The new TSE modue has some signals I don't know how to connect: tse_mac.pcs_mac_rx_clock and tse_mac.pcs_mac_tx_clock I'm going to guess that I should export those 2 clocks so that they can be 2.5/25/125 MHz depending on enet speed... I have managed to get a my_ddio module from a windows PC running quartus 13sp1 for the my_ddio module, but the altera pll is still greyed out... can I just put the pll in qsys with my processor and export the signals that way? Is there an update to this particular tutorial somewhere? (or a similar example for 13sp1 with a DE2-115 board?) Thanks.30 Replies
- Altera_Forum
Honored Contributor
Found a copy of the megawizard files in an example supplied on the CDROM with my DE2-115 board... I took those to the windows machine, did a 'copy' with the megawizard, and then an edit... that seemed to generate the ALTPLL files i needed.
Cyclone IV was the selected device... so I'm guessing that module should work now... only outstanding question is what to do with tse_mac.pcs_mac_rx_clock and tse_mac.pcs_mac_tx_clock... Any ideas? - Altera_Forum
Honored Contributor
I started over on a windows machine as the megafunction wizard doesn't work correctly on linux-32bit Now I'm getting some errors when I try to build the system:
Error (12002): Port "tse_mac_conduit_connection_ena_10" does not exist in macrofunction "system_inst" Error (12002): Port "tse_mac_conduit_connection_eth_mode" does not exist in macrofunction "system_inst" Error (12002): Port "tse_mac_conduit_connection_mdc" does not exist in macrofunction "system_inst" Error (12002): Port "tse_mac_conduit_connection_mdio_in" does not exist in macrofunction "system_inst" Error (12002): Port "tse_mac_conduit_connection_mdio_oen" does not exist in macrofunction "system_inst" Error (12002): Port "tse_mac_conduit_connection_mdio_out" does not exist in macrofunction "system_inst" Error (12002): Port "tse_mac_conduit_connection_rgmii_in" does not exist in macrofunction "system_inst" Error (12002): Port "tse_mac_conduit_connection_rgmii_out" does not exist in macrofunction "system_inst" Error (12002): Port "tse_mac_conduit_connection_rx_clk" does not exist in macrofunction "system_inst" Error (12002): Port "tse_mac_conduit_connection_rx_control" does not exist in macrofunction "system_inst" Error (12002): Port "tse_mac_conduit_connection_tx_clk" does not exist in macrofunction "system_inst" Error (12002): Port "tse_mac_conduit_connection_tx_control" does not exist in macrofunction "system_inst" I'm guessing that the new TSE module has renamed or added some items... The tutorial files are located here: ftp://ftp.altera.com/up/pub/altera_material/12.0/tutorials/ and I'm going to try attaching the .v and a qsys screenshot of the problem area (I'm using 13sp1 vice the 12.0 that this tutorial was written for) I had to collapse the sys_clock module so more would show. The forum won't let me upload the qsys file, so I put in the screenshot and the .v file that qsys generated. - Altera_Forum
Honored Contributor
problem is with the tutorial's supplied tse_tutorial.v being incompatible with the new TSE.... I modified it like this:
nios_system system_inst( .clk_clk (sys_clk), // clk.clk .reset_reset_n (core_reset_n), // reset.reset_n //modified to this 10/10/2013: // .tse_mac_conduit_connection_rx_control (NET1_RX_DV), // tse_mac_conduit.rx_control .tse_mac_mac_rgmii_connection_rx_control (NET1_RX_DV), // .tse_mac_conduit_connection_rx_clk (NET1_RX_CLK), // .rx_clk .tse_mac_pcs_mac_rx_clock_connection_clk (NET1_RX_CLK), // .tse_mac_conduit_connection_tx_control (NET1_TX_EN), // .tx_control .tse_mac_mac_rgmii_connection_tx_control (NET1_TX_EN), // .tse_mac_conduit_connection_tx_clk (tx_clk), // .tx_clk .tse_mac_pcs_mac_tx_clock_connection_clk (tx_clk), // .tse_mac_conduit_connection_rgmii_out (NET1_TX_DATA), // .rgmii_out .tse_mac_mac_rgmii_connection_rgmii_out (NET1_TX_DATA), // .tse_mac_conduit_connection_rgmii_in (NET1_RX_DATA), // .rgmii_in .tse_mac_mac_rgmii_connection_rgmii_in (NET1_RX_DATA), // .tse_mac_conduit_connection_ena_10 (ena_10), // .ena_10 .tse_mac_mac_status_connection_ena_10 (ena_10), // .tse_mac_conduit_connection_eth_mode (eth_mode), // .eth_mode .tse_mac_mac_status_connection_eth_mode (eth_mode), // .tse_mac_conduit_connection_mdio_in (mdio_in), // .mdio_in .tse_mac_mac_mdio_connection_mdio_in (mdio_in), // .tse_mac_conduit_connection_mdio_out (mdio_out), // .mdio_out .tse_mac_mac_mdio_connection_mdio_out (mdio_out), // .tse_mac_conduit_connection_mdc (mdc), // .mdc .tse_mac_mac_mdio_connection_mdc (mdc), // .tse_mac_conduit_connection_mdio_oen (mdio_oen) // .mdio_oen .tse_mac_mac_mdio_connection_mdio_oen (mdio_oen) //END modifications 10/10/2013 ); and the design compiled in Quartus. (this isn't the whole file, just the part of it I modified) Now... have to see if the code will run on it. - Altera_Forum
Honored Contributor
Grrrr, code didn't run, it prints the 'send' information but nothing shows on the activity lights, and nothing is ever recieved... looks like there's a disconnection somewhere... anyone have an idea?
- Altera_Forum
Honored Contributor
Re-did the Qsys system in Quartus2 version 12, and I'm still having the same problems... this is what it displays:
Opened scatter-gather dma transmit device Opened scatter-gather dma receive device send> TEST1234TEST TEST1234TEST send> Pretty sure there is supposed to be a 'receive' in there somewhere... // Output received text alt_printf( "receive> %s\n", rx_frame + 16 ); (This was exactly what it did in the quartus13sp1 version I entered) - Altera_Forum
Honored Contributor
The system and code works, problem was ethernet cable between eth0 and eth1
- Altera_Forum
Honored Contributor
--- Quote Start --- The system and code works, problem was ethernet cable between eth0 and eth1 --- Quote End --- Hello Everyone, I have the same problem with DE2-115 Board. I created tse_tutorial.v by following triple-speed ethernet on DE2-115 boards tutorial file. The leds at etho and eth1 are also showing after running the program (action->continue) at the monitor. But, nothing is displaying in terminal window. Any suggestions? - Altera_Forum
Honored Contributor
--- Quote Start --- Grrrr, code didn't run, it prints the 'send' information but nothing shows on the activity lights, and nothing is ever recieved... looks like there's a disconnection somewhere... anyone have an idea? --- Quote End --- Hi david1024, Thank you for detailing your experience with this code. I have run into almost all of the above problems mentioned as well. However I find that the issue I quoted still happens sporadically, and so it is difficult to trace it back to a root problem. Did you find any reasons or fixes related to board not transmitting when it was supposed to? Thank you, Leigh - Altera_Forum
Honored Contributor
--- Quote Start --- Hi david1024, Thank you for detailing your experience with this code. I have run into almost all of the above problems mentioned as well. However I find that the issue I quoted still happens sporadically, and so it is difficult to trace it back to a root problem. Did you find any reasons or fixes related to board not transmitting when it was supposed to? Thank you, Leigh --- Quote End --- I would suggest going through the tutorial with the version of Quartus and EDK it was written for. That'll make sure your hardware is working correctly. As to intermittent problems... I really can't help much other than suggest using eclipse/signaltap to monitor/track down the problem. - Altera_Forum
Honored Contributor
anyone manage to solve the problem?