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TRoa's avatar
TRoa
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

Problem with Gate level simulation

Hi, I made a simple design for just experimentation. In that design, I instantiated a multiplier from IP catalog(simple multiplier). Then I synthesized. Everything was ok. Then I wrote a testbench a...
  • TRoa's avatar
    TRoa
    Icon for Occasional Contributor rankOccasional Contributor
    6 years ago

    The problem was timing. The model or the IP was not starting till 4995 ps . So What I did, I regenerated that IP with same specs, but with little less files(this time only with .v files). And problem was solved.

    Now, no starting delays and IP is also working with peco seconds accuracy.

    Thanks for your replay.