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MDiDo's avatar
MDiDo
Icon for New Contributor rankNew Contributor
6 years ago

Problem with Deinterlacer

Hello, I have a problem with the Deinterlacer IP Core. I created a video system with the following input chain: CVI->CLIPPER->COLOR PLANE SEQUENCER->CHROMA RESAMPLE->DEINTERLACER->MEMORY CONTROLLER-...
CheepinC_altera's avatar
CheepinC_altera
Icon for Regular Contributor rankRegular Contributor
6 years ago
Hi, Thank for your update. For your information, I am using Modelsim - Intel FPGA Edition 10.5b at which this design is created and tested with, based on previous information that I got from wiki. You might want to try with Modelsim to see if it works as a workaround. Thank you very much. Best regards, Chee Pin
MDiDo's avatar
MDiDo
Icon for New Contributor rankNew Contributor
6 years ago

If I use Modelsim it correctly works. Anyway I need use QuestaSim in order to create an UVM testbench. I'll try with an other QuestaSim version.