Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Problem simulating Nios II design and external logic

Hello, I have a project based on a Nios II processor and external logic connected to it via avalon interface. I know how to simulate a Nios II design, and how to simulate classical VHDL design,...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Yes, that was the problem. We have to add the vhdl file to the ModelSim project and compile it before. Thanks for your help.