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Altera_Forum
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15 years ago

Powerplay power confidence - Software

I am currently attempting to obtain a high confidence using the powerplay power analyzer tool found in Quartus. For my setup, I use Quartus to create a project and build a Nios II processor using onchip memory in the SOPC builder. I have the SOPC builder generate the necessary simulation files in addition to the the system HDL files.

After generating the necessary files from the SOPC builder, I use the Nios II Eclipse plugin and develop my software for my generated system. I build and run the system as a ModelSim-Altera simulation.

Within ModelSim-Altera, I compile and add the proper signals to the wave. Commands, s, c, w. Then I generate a vcd file: vcd file testfile.vcd. I add all the signals of the system: vcd add -r /test_bench/dut/*. I then run the system, run -all.

After running I quit the simulation and close ModelSim-Altera and open Quartus back up. I then choose the Powerplay power analyzer and select the ModelSim generated vcd file. I let select vectorless estimation and run the tool.

So far results surrounding using software has provided only low confidence rating in the powerplay power analyzer. In addition, I have used the generated sdo and vho files from the EDA gate level simulation and attempted to add them to the setup_sim.do and re-running the run-as ModelSim-Altera option in the Nios II eclipse plugin.

Is there any way to obtain a high confidence rating from the powerplay power analyzer tool using the Nios II Eclipse generated C/C++ code in addition to the SOPC system build.

Thanks for the help.

akodocom

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    Hi,

    I'w got similar questions.

    When creating simulation files in the SOPC environment, RTL level simulation files are created (.vhd files, not gate level .vho files).

    I know that RTL simulation only considers the functionality of a design, where as gate level simulation also takes timing information into consideration (using a compiled netlist).

    For the PowerPlay power analyser, I would like to acheive High Power Estimation Confidence level for the SOPC system.

    Inorder to acheive this, the PowerPlay power analyser needs toggling data (collected in a .VCD file) from gate-level simulations.

    From the Eclipse SBT, the SOPC system is simulated at the RTL level.

    I create a SW application and I use "Run As" -> "Nios II ModelSim" inorder to run the simulation. This is conveniant, since the SW application provides correct stimulus data for the SOPC/NiosII system, however, I'm not able to acheive High Power Estimation Confidence level

    On the other hand, The Quartus II compiles the whole project (SOPC + toplevel file that instantiates the SOPC design) and creates a netlist which can be used inorder to run a gate level simulation. However, doing things this way, I don't have a SW application that can be used as stimulus data for the SOPC/Nios II design.

    If anyone knows of a more conveniant way of acheive High Power Estimation Confidence level for the SOPC system, (or if there is a way of doing this using QSYS), kindly let me know.

    Saber890