mitsvoid
New Contributor
2 years agoPlatform designer/NiosII Eclipse: SRAM controller error
Dear all,
Good day, I hope you are doing well. I am trying to add an SRAM controller to my project, but I received the following error in Nios II Eclipse:
INFO: Tcl message: "STDIO character device is jtag_uart_0" INFO: Tcl message: "System timer device is sys_timer" SEVERE: CPU "nios2_gen2_0" has no memories connected to its Avalon host(s) WARNING: Tcl script "bsp-set-defaults.tcl " error: CPU "nios2_gen2_0" has no memories connected to its Avalon host(s) SEVERE: [Error] altera_hal_linkerx_generator: Required linker section mappings do not exist: "[.entry, .exceptions, .rodata, .rwdata, .text, .bss, .heap, .stack]" SEVERE: [Error] altera_hal_linkerx_generator: Required linker section mappings do not exist: "[.entry, .exceptions, .rodata, .rwdata, .text, .bss, .heap, .stack]" SEVERE: nios2-bsp-create-settings failed. nios2-bsp: nios2-bsp-create-settings.exe failed nios2-bsp hal . ../../led.sopcinfo --cpu-name nios2_gen2_0 failed
Please note that I have followed the steps below:
- IP catalog -> University program -> memory -> SRAM controller.
SRAM: sram_avalon_sram_slave is connected to nios_cpu: data_master and instruction_master .
nios_cpu -> reset_vector_memory and Exception_vector_memory is to sram.avalon_sram_slave.
The base address from SRAM is 0x0000_0000.
I have created the top entity module in verilog and all pins are connected.
The generated SOPCINFO file for the nios_cpu module has the the above info :
<assignment> <name>embeddedsw.configuration.exceptionSlave</name> <value>sram.avalon_sram_slave</value> </assignment> <assignment> <name>embeddedsw.configuration.resetOffset</name> <value>0</value> </assignment> <assignment> <name>embeddedsw.configuration.resetSlave</name> <value>sram.avalon_sram_slave</value> </assignment>
Note:
Board Altera DE2-115.
Quartus version 22.1.
No errors if i try other projects without SRAM.
I would appreciate any advice on this issue.
Thank you.