Forum Discussion
Upon careful observation, it appears that the extended time required to open the Platform Designer is influenced by two main factors:
1) Tool Limitation: The Quartus Standard Edition tool, unfortunately, has certain limitations in comparison to the Pro Edition, leading to extended opening times.
2) Complex Qsys Design: Your design composed of numerous parameterized generic custom components, contributes to the longer duration. A notable improvement was observed (from several hours to approximately 1 hour) when removing 60 parameterized generic custom components
Given the circumstances, migrating the design to Quartus Pro is unfeasible. We will help to provide the best guidance on optimizing the Platform Designer's performance, as outlined in the user guide link I shared previously.
While the outcome may not match the efficiency of Quartus Pro, we are committed to offering the most effective suggestions.
Feel free to reach out if you have further questions or need additional assistance.
Best Regards,
Richard Tan
Observation 2) is incorrect: as stated in my reply from September 22nd, the removal of the 60 custom generic components didn't improve the performance at all.
It was the removal of the Modular Scatter-Gather DMA Intel FPGA IP that reduced the build time and the time necessary to open the top level Qsys file.
That's why I asked whether there is any way to instantiate a pre-compiled IP core in the platform designer.
I have not yet had the time to take a look into the document and video you shared in your reply from September 25th.