Platform Designer: SV Interfaces and IP Instantiation

I’m working on a user register map with an Avalon interface that will be instantiated as a component inside Platform Designer.

The issue is that when I use a struct for the Avalon interface, the tools only generate plain Verilog code, which doesn’t allow for SystemVerilog structs. Are there any solutions or recommendations?

I already tried to include the package. Also, I couldn't find any information on a specific argument for the tcl instantiation of the component.

Thank you in advance.