ArintelNew Contributor5 years agoPlatform Designer - PCIe-DMA BAR size Hello Everyone, I used Quartus 20.1 to generate the Example Design of "Arria 10 PCIe-Avalon-MM-DMA". I then used Platform Designer to add an "Avalon-MM Clock Crossing Bridge" IP core. I connected rm...Show More
Recent DiscussionsTiming analysis - long combinational pathThe quartus license works with version 25.0 but not with version 17.0How can I use Quartus Pro 25.1 sopc-create-header-files tool to generate a jtag master header file?timing violation fixError (292014): Can't find valid feature line for core SLL_CA_HBC_T001_Hyperbus_Memory_Controller_10