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ALMSlinger's avatar
ALMSlinger
Icon for New Contributor rankNew Contributor
2 years ago

Platform Designer - clock bridge : Interfaces must be on the same clock domain

Hi, To split up the a large clock tree, I inserted a clock bridge in my platform designer file. Now, I have one PLL generated clock CLK --> clk bridge --> cout_0, cout_1, cout_2. The clock bridge...
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SyafieqS's avatar
SyafieqS
Icon for Super Contributor rankSuper Contributor
2 years ago

As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to https://supporttickets.intel.com/, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.


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