Platform Designer(旧Qsys)でHDLを生成し、QIPファイルを登録すると最初に生成したHDLがCompileに使われます。しかし、QSYSファイルを登録すると、Compileするたびにdb/ipディレクトリ以下にHDLを再生成し、そのHDLをCompileしているようです。QSYSファイルを登録してもQIPファイルを登録した時と同じように最初に生成したHDLをCompileするように設定できないのでしょうか？

HDL originally generated the platform Designer (formerly Qsys) generates HDL and to register the QIP file used to Compile. However, each time you Compile and register the QSYS file in the db / ip directory HDL to regenerate, it seems that Compile the HDL. Cannot be set to Compile the same as when you create a QIP file to register the QSYS file generated in the first HDL?

​I'm sorry. I will re-translate and post.

When generate HDLs with Platform Designer and add the QIP file to the project,

the first generated HDLs are used for compile.

However, when add the QSYS file to the project,

HDLs are re-generated below the db/ip directory and compiled every time.

Can I prevent it from regenerating HDLs and use the first generated HDLs,

even if add the QSYS file to the project ?

Thank you for your comments.

Unfortunately, I use Quartus Prime Standard Edition.

So, "IP Regeneration Policy" is fixed to "Always regenerate design files for IP cores".​

(can not select "Never regenerate design files for IP cores")

​

I understand that I have to use QIP file instead of QSYS file.

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Thank you so much.​