Forum Discussion
MichaelB
Occasional Contributor
Occasional ContributorPlan error after upgrading Quartus Pro version 20.4 to 22.4
Hi, I just upgrade my project for a Stratix 10 MX FPGA from 20.4 to 22.4. With 20.4 the design run was successful but after upgrading to 22.4 I see planning errors with the same RTL / IP set: ...
RichardT_altera
Super Contributor
Super ContributorCould you please share your .qar design file by archiving the project (Project > Archive Project) instead of providing three individual IP files?
This will allow me to duplicate the error in order to debug the issue effectively.
Regards,
Richard Tan
