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Altera_Forum's avatar
Altera_Forum
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12 years ago

Pin assignment for comparator

Hello, still designing a comparator (VHDL) and i want to assign an input pin with a fixed gain/ref (e.g 00001100). How am i supposed to assigned this width to the FPGA??? Is it compulsory i attach a daughter board (DDR memory) and assign this data to it or i can simply pick any of the traditional mother board pins for assignment???

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  • Altera_Forum's avatar
    Altera_Forum
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    I'm not sure I understand your question, but if it is a value that you want to be fixed by external means (by the PCB itself, or using configuration straps / dip switches / connectors) then you need to assign the input pins in your project to the relevant FPGA pins.

    If it is a value that you fix in your Quartus project then you don't need to use FPGA pins at all.

    I don't really get how this is related to DDR memory.
  • Altera_Forum's avatar
    Altera_Forum
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    K... i already assigned a value in my VHDL to the gain/ref (000000000000100). After compilation, i had to assigned each I/O to an FPGA pin at the assignment editor. But i did assign the gain with a width 16 to some HSTC pins and it didn't work. where exactly do i assign the gain in the FPGA??. Or is assignment not necessary cos i had specified a value on my code???

  • Altera_Forum's avatar
    Altera_Forum
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    How exactly did you assign this value to your gain/ref? If Quartus asks you to assign your gain signals to FPGA pins, it means that you connected your gain signal to ports on the top level HDL file. In that case the value you assigned will be ignored by Quartus, and the voltage level on those pins will be used instead.

    What you need to do is disconect your gain/ref signal from any ports on the top level file and assign it to a constant value there.
  • Altera_Forum's avatar
    Altera_Forum
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    --- Quote Start ---

    How exactly did you assign this value to your gain/ref? If Quartus asks you to assign your gain signals to FPGA pins, it means that you connected your gain signal to ports on the top level HDL file. In that case the value you assigned will be ignored by Quartus, and the voltage level on those pins will be used instead.

    What you need to do is disconect your gain/ref signal from any ports on the top level file and assign it to a constant value there.

    --- Quote End ---

    Do take port B out during mapping of the comparator???
  • Altera_Forum's avatar
    Altera_Forum
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    No, don't take it completely out, but map it to a constant signal instead of a top level port.