Forum Discussion
MinzhiWang
Occasional Contributor
1 year agoOne Recovery Timing Violation Issue Need You Help
Hello, I'm using LVDS receiver (LVDS_RX) to process ADC serial output data stream. LVDS_RX provides one output parallel clock, rx_coreclock, which is used for asyncronous FIFO's write clock. The FIF...
RichardT_altera
Super Contributor
1 year agoTry search for "Clock Domain Crossing Considerations"
https://learning.intel.com/developer/learn
Or you can look at youtube video instead:
https://www.youtube.com/watch?v=BNiXxmQlCCs
Regards,
Richard Tan