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MinzhiWang's avatar
MinzhiWang
Icon for Occasional Contributor rankOccasional Contributor
1 year ago
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On-chip memory clear questions

Hi, We used many kinds of memories in FPGA logic design. RAM, ROM and FIFO. We can use MIF or HEX files to inialize on-chip RAM or ROM. Now we encounter situation: we want to clear on-chip RAM in r...
Compilation
  • TingJiangT_Intel's avatar
    TingJiangT_Intel
    1 year ago

    We'd recommend using M20K which is dedicated memory resource to realize RAM instead of MLAB. MLAB is mainly using for logic. It will consume more resource when using MLAB to implement RAM.


FvM's avatar
FvM
Icon for Super Contributor rankSuper Contributor
1 year ago

Hi,
IMHO there's no other way to clear RAM content than writing zero sequentially to all locations. FIFO clear works differently, it resets read and write pointers, present FIFO RAM content is maintained but not visible externally.

MinzhiWang's avatar
MinzhiWang
Icon for Occasional Contributor rankOccasional Contributor
1 year ago

Hi FvM,

I appreciate that you reply this post so quickly. Now I'm sure that I understand the UG and your comments.

For the on-chip RAM usage, i also have other questions to dicuss here. Our device is of Cyclone 10 GX. We met on chip memory exhausted issue. Compilation report give us not only error info, also several other infos as following:

Info(170034): Selected device has 587 memory locations of type M20K block. The current design requires 626 memory locations of type M20K block to successfully fit.
Info(170033): Memory usage required for the design in the current device: 107% M20K block memory block locations required
Info(170043): The Fitter setting for Equivalent RAM and MLAB Paused Read Capabilities is currently set to Care. More RAMs may be placed in MLAB locations if a different paused read behavior is allowed.

We went to advance Fitter Settings page to change the setting of "Equivalent RAM and MLAB Paused Read Capabilities" from Care to don't care. Then the compilation was passed.

My question is what's the main effection of this setting?

You know, we implement many small size FIFO and RAM in our application. So we went to FIT report to check the place report and found one item as "Fits in MLABs". Do the "Yes" indicators mean those blocks can be force to implemented thru MLABs? And you can't for the "No" corresponding blocks to realized by MLABs?

Thanks