Multiple clock assignment to SOPC module

Hi,

I have made an SOPC module with the "New component..." vizard. The VHDL code for the component contains one Avalon MM interface, one Avalon ST interface, and some signals that are exported to the top-level.

Furthermore 3 clock inputs are used: one for MM & ST bus (share same clock), and two for the exported signals.

The component generation is done without errors.

Now the problem starts when trying to add the component to a NIOS system, in the clock column of the SOPC builder it is possible to assign clocks for the MM & ST interface (Ok - I just set them to the same clock).

But it is not possible to assign clocks to the two other clock inputs, at the line where the name of the component is written, the word "Multiple" is written for clock assignment. If I change it to a clock source, I have no way of knowing which of the clock inputs I'm assigning.

Attached is screen shot of the problem.

Is there a way I can "expand" the view of the component, so I can see/assign all clocks?

Is it possible to edit a file instead of using the GUI?

BR

Peter