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18 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    --- Quote Start ---

    Ok, good to hear you understand the tradeoffs.

    Don't worry, you'll find features of HDL languages that are not supported in Quartus too :)

    Perhaps you should ask more questions when you get stuck. If you create code, a testbench, and clearly describe what you are failing to grasp, then the readers of this forum are fairly helpful. If you simply post code that will not even compile, along with too vague a question, eg., "Help, I can get this to compile", usually will not get a response, since its usually because "You're too lazy to read the error messages". If you take the time to ask an intelligent question, you will get intelligent responses.

    Cheers,

    Dave

    --- Quote End ---

    Yes, This forum is good with responses to half-intelligent questions, I appreciate that. Sometimes, I'm just completely clueless on how to even approach a problem in VHDL and the building block style of schematic seems like an easier way to go about it.
  • Altera_Forum's avatar
    Altera_Forum
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    --- Quote Start ---

    Sometimes, I'm just completely clueless on how to even approach a problem in VHDL and the building block style of schematic seems like an easier way to go about it.

    --- Quote End ---

    I'll typically draw a block diagram with counters and data path logic, then draw the waveforms that logic needs to work, and then start writing an HDL design along with its testbench. I then "fill in the details" by adding new test sequences, and adding FSM states and datapath controls until the logic is correct. For example, read through this document ...

    http://www.ovro.caltech.edu/~dwh/correlator/pdf/ftdi.pdf

    Cheers,

    Dave
  • Altera_Forum's avatar
    Altera_Forum
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    I'll give it a read. hopefully I can take something interesting away from this.

  • Altera_Forum's avatar
    Altera_Forum
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    --- Quote Start ---

    I'll give it a read. hopefully I can take something interesting away from this.

    --- Quote End ---

    You could also try and come up with an HDL design that you think is interesting, or is useful to you, and come up with a "design description", post that along with how you think you'd implement it either in HDL or a schematic. The ultimate goal would be to simulate the design in Modelsim as well as synthesize it in Quartus (along with pin and timing constraints). That'll give you a "real-world" reference design that is meaningful to you. Once you have your first design, and an appropriate design sequence, others will follow much easier.

    Cheers,

    Dave
  • Altera_Forum's avatar
    Altera_Forum
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    well, a useful design to me would be learning how to interface with the audio codec of my DE2, and outputting waveforms. I guess I could "blog" about it in a forum thread?

  • Altera_Forum's avatar
    Altera_Forum
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    --- Quote Start ---

    well, a useful design to me would be learning how to interface with the audio codec of my DE2, and outputting waveforms.

    --- Quote End ---

    That sounds like a reasonable goal. Looking at the DE2 schematic, the audio interface is a WM8731, and it shows an I2C interface, and some serial interfaces for the audio input and output.

    So, to start with you need to decide how you are going to access the I2C bus, and where your software to control that I2C interface will reside, eg., on the FPGA in a NIOS II processor, or externally on your PC. My personal preference is to initially test my hardware interfaces via code running on my PC using the JTAG-to-Avalon-MM interface.

    The Wiki has information on using the OpenCores I2C controller

    http://www.alterawiki.com/wiki/i2c_%28opencores%29

    (I have not tried this particular controller)

    --- Quote Start ---

    I guess I could "blog" about it in a forum thread?

    --- Quote End ---

    I'd recommend writing a tutorial and posting it to the AlteraWiki where others can more easily locate it. I personally prefer a PDF tutorial document and a zip file containing code, rather than a stream-of-consciousness blog ...

    Take a look at this tutorial here:

    http://www.alterawiki.com/wiki/using_the_usb-blaster_as_an_sopc/qsys_avalon-mm_master_tutorial

    It needs to be revised for 13.1, however, the Quartus Qsys procedure is still pretty much the same, its just the simulation that has changed slightly.

    Cheers,

    Dave
  • Altera_Forum's avatar
    Altera_Forum
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    Thanks,

    I have a bit of learning to do, particularly with I2C. I'll probably start with learning the I2C interface before I write any tutorials. Hopefully this could get me started:

    http://www.fpga4fun.com/i2c.html

    Thanks for your input. I'll start learning right away.

    -edit-

    Just chiming in,

    I really like this one. the code seems to be really understandable. I'll give it a few reads. Looks like I won't have many problems learning I2C!! :

    http://hamsterworks.co.nz/mediawiki/index.php/i3c2
  • Altera_Forum's avatar
    Altera_Forum
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    Note how much "easier" it is to learn when you have a well-defined goal.

    One of your objectives with these controllers should be to create a simulation. There are simulation models of I2C EEPROMs, so its easy enough to find an I2C device to talk to.

    Cheers,

    Dave