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NGord's avatar
NGord
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2 years ago

Modelsim Lite Quartus 18.1 - simulating ROM

When simulating a ROM component within the testbench file (for generating a data packet) I get the Modelsim warning # ** Warning: (vsim-3473) Component instance "inst_altera_testbench_packet_rom : ...
Simulation
NGord's avatar
NGord
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2 years ago

I tried a .mif file but same issue.

NGord's avatar
NGord
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

More info:
I fixed the "is not bound" fault by ensuring Modelsim compiled the ROM first by using a script.
The next issue was 'unresolved defparam'
So I added 'altera_mf_ver' library to the vsim script as community solution suggested.

That fixed that one.

But I am left with below - same for whether I use a hex or a mif file.

# ** Warning: (vsim-3534) [FOFIR] - Failed to open file "./ip/altera_testbench_packet_rom/altera_testbench_packet.mif" for reading.
# No such file or directory. (errno = ENOENT) : /build/swbuild/SJ/nightly/18.1std/625/l64/work/modelsim/eda/sim_lib/altera_mf.v(263)
# Time: 0 ps Iteration: 0 Instance: /testbench/inst_altera_testbench_packet_rom/altsyncram_component/m_default/altsyncram_inst
# ERROR: cannot read ./ip/altera_testbench_packet_rom/altera_testbench_packet.mif.
# ** Warning: (vsim-7) Failed to open readmem file "./ip/altera_testbench_packet_rom/altera_testbench_packet.ver" in read mode.
# No such file or directory. (errno = ENOENT) : /build/swbuild/SJ/nightly/18.1std/625/l64/work/modelsim/eda/sim_lib/altera_mf.v(48976)

Its looking in entirely the wrong place for altera_mf.v and moreover, there is no such file as altera_testbench_packet.ver, if anything its altera_testbench_packet.v

  • NGord's avatar
    NGord
    Icon for Occasional Contributor rankOccasional Contributor
    2 years ago

    I get it ,altera_testbench_packet.ver is supposed to be created from the .mif file by altera_mf.v.
    I changed my script to the attachment and now I get:

    # No such file or directory. (errno = ENOENT) : C:/intelFPGA_lite/18.1/quartus/eda/sim_lib/altera_mf.v(264)
    # Time: 0 ps Iteration: 0 Instance: /testbench/inst_altera_testbench_packet_rom/altsyncram_component/m_default/altsyncram_inst
    # ERROR: cannot read ./ip/altera_testbench_packet_rom/altera_testbench_packet.mif.
    # ** Warning: (vsim-7) Failed to open readmem file "./ip/altera_testbench_packet_rom/altera_testbench_packet.ver" in read mode.
    # No such file or directory. (errno = ENOENT) : C:/intelFPGA_lite/18.1/quartus/eda/sim_lib/altera_mf.v(48977)..

    The key has to be
    No such file or directory. (errno = ENOENT) : C:/intelFPGA_lite/18.1/quartus/eda/sim_lib/altera_mf.v(264) - but there is!!!