Altera_Forum
Honored Contributor
7 years agoModelsim hanging trying to compile Stratix IP
Hi folks, I'm in the process of migrating a design from Quartus 16.1 targeting an Arria 10 to Quartus 18.0 targeting a Stratix 10. Trying to port one of the testbenches that uses the hard floating point IP, modelsim is hanging when doing the following:
# vlog -reportprogress 300 -sv c:/intelfpga_pro/18.0/quartus/eda/sim_lib/mentor/fourteennm_atoms_ncrypt.sv -work fourteennm_ver This appears to be from about three quarters of the way through the "dev_com" step from the generated msim_setup.tcl file. Anyone have any ideas what might be causing it and/or what I need to kick to get it to compile? Thanks, Andy