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Altera_Forum
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8 years ago

Modelsim hanging trying to compile Stratix IP

Hi folks, I'm in the process of migrating a design from Quartus 16.1 targeting an Arria 10 to Quartus 18.0 targeting a Stratix 10. Trying to port one of the testbenches that uses the hard floating po...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

I've now resolved this issue with the help of Altera tech support. If anyone else hits this same problem, there is a bug in the generated msim_setup.tcl file (which should get fixed with a patch at some point...) when using the free Modelsim version. To fix the problem, change the line:

return [string match "*ModelSim*Intel FPGA Edition*" [ vsimVersionString ]]

to:

return [string match "*ModelSim*INTEL*FPGA*EDITION*" [ vsimVersionString ]]

This is around line 170 in the file.

Hopefully that'll save someone else some pain!

Andy