Forum Discussion
Missing DPI import function "dvc_axi4_initialise_SystemVerilog" while simulating axi4 bfm in VCS
- 2 years ago
Hi Dins,
Attached the design example script file.
Make sure line 14:
export QUESTA_MVC_GCC_LIB=${MENTOR_VIP_AE}/common/questa_mvc_core/linux_x86_64_gcc-6.2.0_vcs
Make sure included line 30:
export LDFLAGS="-L ${QUESTA_MVC_GCC_LIB} -Wl,-rpath ${QUESTA_MVC_GCC_LIB} -laxi4_IN_SystemVerilog_VCS_full_DVC "
and line 37-42:
$MENTOR_VIP_AE/common/questa_mvc_svapi.svh \
$MENTOR_VIP_AE/axi4/bfm/mgc_common_axi4.sv \
$MENTOR_VIP_AE/axi4/bfm/mgc_axi4_monitor.sv \
$MENTOR_VIP_AE/axi4/bfm/mgc_axi4_inline_monitor.sv \
$MENTOR_VIP_AE/axi4/bfm/mgc_axi4_slave.sv \
$MENTOR_VIP_AE/axi4/bfm/mgc_axi4_master.sv \
Hi Dins,
Have you got any problem with the axi4 deign example stated in this document https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/mentor_vip_ae_usr.pdf
Make sure follow the steps stated for vcs simulation.
May be try regenerate that particular IP as well.
Thanks,
Sheng
- Dins2 years ago
New Contributor
Hi ShengN_Intel,
I didn't get any problem with simulating axi4 design example, and I have followed the same steps as per the document and even tried regenerating the IP as well but getting the same error. I have given the same library paths given in the design example in my design.
Trying all possible ways to fix this issue. Shall I need to define this function (dvc_axi4_initialise_SystemVerilog) anywhere?
Thanks, and regards,
Dins