MAX10 UFM timing

Based on the text in 4.2.4. UFM Sector Erase Operation of the UFM User Guide and what the simulation shows I now believe the Avalon interface at least for the MAX10 work like this: avmm_csr_read merely selects the address of register (Status or control) to be output. That register is then immediately output after the address has been clocked in. (Kind of what diagram indicates) Because I had initiated a sector Erase prior to read the status goes to Busy apparently after some delay then back idle when complete at up to 350mSec. The status is continuosly available on avmm_csr_readdata and do not need to keep reading (Strobing avmm_csr_read or taking it high). Does not seem avmm_data_waitrequest and avmm_data_readdatavalid are involved in IO on the status or control register other than indicating when busy and cannot use the data side interface. Will need to update my test VHDL and see if this model of operation pans out.