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Pooja_03
New Contributor
New ContributorMAX10 (10M50DAF484C8G): Maximum Frequency for CLK In, CLK Out, and GPIO Pins"
Hello, I am working with the MAX10 FPGA (part number: 10M50DAF484C8G) and would like to know the maximum frequency that can be used for the following: CLK In CLK Out Normal GPIO pins Could yo...
AqidAyman_Altera
Regular Contributor
Regular ContributorHi,
Based on the MAX 10 datasheet for PLL specifications, PLL output frequency for external clock output can go up to 472.5 MHz. However, this parameter is limited in the Intel® Quartus® Prime software by the I/O maximum frequency. The maximum I/O frequency is different for each I/O standard.
Regards,
Aqid
