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OJin0's avatar
OJin0
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

Is there any reason why the actual behavior in this symbol is different from the schematic?

I use Quartus (Quartus Prime 19.1) Lite Edition. The attached 32-bit counter symbol outputs a duty 50 waveform from t1 to t8, but a narrow waveform from t9 to t31. JOS_COUNT_4_CiRs are all the same....
KhaiChein_Y_Intel's avatar
KhaiChein_Y_Intel
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hi OKsang,

I understand that the error cannot be reproduced again in JOS_counter_32 design, everything is working as expected now.

Regarding the ElectricPiano_00_00 design, you mentioned that the problem had occured in this design too. May I know whether the error is referring to simulation error or LPM_COUNTER generation error?

Thanks.

Best regards,

KhaiY

OJin0's avatar
OJin0
Icon for Occasional Contributor rankOccasional Contributor
5 years ago
Hello, In ElectricPiano_00_00, LPM_COUNTER has no problem at all. 50MHz input, 1/50 divided, 1MHz accurate output. OK. However, there is a problem with the array of four synchronous counters (74160). The output of the 4th counter does not output at the designed frequency. There is an error in the simulation result, and there is also an error in the actual board output. Below is my post on the forum. - Below - " Right now I'm using version 19.1 only. We found clues that differed between the function of the schematic and the simulation result. As below. Like Schematic, inst7 (TFF) should be triggered on X3 output to be normal. However, in the currently simulated wave picture, inst7 (DFF) was triggered on X2. In the PIN_F12 terminal of the board, 261Hz is output if it is normal as in the schematic, but the current 522Hz signal is actually doubled. Why are they different from the schematic and simulation results? I have attached the current project folder. " Thank you.