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roeekalinsky's avatar
roeekalinsky
Icon for Contributor rankContributor
1 year ago

IOPLL non-dedicated feedback option doesn't work correctly

In Stratix 10 and Agilex, the IOPLL supports an option for using a non-dedicated feedback path when using the normal compensation mode or source-synchronous compensation mode. However, the non-dedica...
Compilation
Hdl
Timing
AqidAyman_Altera's avatar
AqidAyman_Altera
Icon for Regular Contributor rankRegular Contributor
1 year ago

Hi Roee,


Apologies for long delay on the update. I tried to communicate this with the internal team and when we look back in your design, can we understand why you need to do compensation and not using direct mode for the IOPLL?


We view the design using the Technology Map Viewer and we noticed that the same input clock to the PLL is using as input clock to the data_shreg[2]. Then, the output of the register is connected to the input of the next register. This will cause clock domain crossing (CDC) and I think this can be the cause of this issue.


We suggested if you do not need compensation, you can use the direct mode or else, you can use the dedicated feedback path.


Regards,

Aqid