IO_OBUF polarity not matching RTL

Hi,

in initial post of this thread, it's stated that Quartus is implementing wrong en signal polarity for tri-stated outputs. In following discussion, actual device behaviour is never mentioned, instead only wrong technology map is shown.

I see now that all Quartus versions (Std and Pro), up to most recent have wrong polarity of en port in technology map viewer, as seen below for Quartus Std. 24.1

module tri_test0 ( 
input  logic      in1,
input  logic	  en1,
output logic      out1
);

assign out1  =  (en1) ? in1 : 1'bz;

endmodule

RTL Viewer

Technology Map Viewer

Implemented hardware is however behaving according to RTL description, the fault is only in technology map viewer.

Inverting en1 in code flips all polarities, RTL map and hardware behaviour are still correct, technology map is wrong.

module tri_test0 ( 
input  logic      in1,
input  logic	  n_en1,
output logic      out1
);

assign out1  =  (!n_en1) ? in1 : 1'bz;

endmodule​

I have no Agilex 7 board at hand to check if it shows wrong hardware behaviour as claimed in post #1, either with previous or recent Quartus Pro versions.

I feel that Intel should clarify if there actually has been wrong hardware behaviour of tri-state output with Agilex 7 or other devices in any Quartus version. And also if obviously wrong polarity display in technology map viewer is planned to be fixed.

Regards
Frank