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Yoni_CMT's avatar
Yoni_CMT
Icon for New Contributor rankNew Contributor
1 year ago

IO input delay

I'm going over the Constraining Source Synchronous Interfaces training and running a very simple design to test myself. I'm trying both center aligned and edge aligned data in the design(with ...
Platform
Timing
RichardT_altera's avatar
RichardT_altera
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1 year ago

Same concern applied to the input delay constraint.

You can checkout the document below for better visualization.

https://www.intel.com/content/www/us/en/docs/programmable/683243/24-1/input-constraints-set-input-delay.html


Do you need help in closing timing? If so, to better understand and troubleshoot the timing failure, it would be really helpful to have a look at your design files in .qar format (Project > Archive Project) .

Could you please share them with me?


Regards,

Richard Tan