Forum Discussion
Yogesh
Occasional Contributor
6 years agoInter path competition
Inter path competition results in timing drop. So My question is :
If there is a BRAM with data_out signal.
This data_out is fed to 10 modules . Just like below:
module_1(.data_in_1(data_out )...
KhaiChein_Y_Intel
Regular Contributor
6 years agoHi
We do not receive any response from you to the previous question/reply/answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you
Best regards,
KhaiY