Ignoring clock skews in set_max_delay constraint

Without looking at your design, if these clock domains are asynchronous, you should use set_clock_groups to simply cut all paths between them. By using set_max[min]_delay, the tool will still analyze timing on paths that go between these clock domains and you see what's happening.

So simply try this instead of set_max[min]_delay:

set_clock_groups -asynchronous -group src_clock -group dest_clk

If the clock domains are synchronous to each other and you're still getting timing failures, then you may need to look into using multicycles or, better yet, adding registers or using a FIFO to handle the clock crossings.

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